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Hewlett
Packard Research Labs Fax: (650)
857-7029 Email:
Partha.ranganathan@hp.com
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Parthasarathy
Ranganathan (Partha) http://www.hpl.hp.com/personal/Partha_Ranganathan/ |
Home
Email: Partha@gmail.com |
Research
Interests
Computer systems architecture and
management, power efficiency, parallel and distributed computing
Key
projects
·
Blades++ and exascale datacenters (TCO-aware next-generation blade systems)
·
SmartPower (power-efficient high-performance system, power
modeling)
·
RSIM (system
evaluation & architectures for media and database applications)
Education
Ph.D.,
May 2000, Electrical and Computer Engineering,
Design of General-Purpose Systems for Emerging Applications
M.S.,
1997, Electrical and Computer Engineering,
An Evaluation of Memory Consistency Models for Shared-Memory Systems with
ILP Processors
B.Tech., 1994, Electrical
Engineering, Indian Institute of Technology (IIT),
Employment
History
Hewlett Packard Labs/Compaq
Western Research Lab, 2000—current
Principal research scientist,
2004-current
Senior research scientist, 2003-
2004
Research scientist/Member
Technical Staff, 2000- 2003
Research Assistant, Rice
University, 1995-2000
Research Intern, Digital Western
Research Laboratory, Summer 1997
Research Intern, Digital Western
Research Laboratory, Summer 1996
Awards and
Recognition
·
6
internal company recognition awards
·
Rice
University Outstanding Young Engineering Alumnus, 2008, for notable accomplishments as an engineer and contributions to Rice
and the community.
·
Technology
review top 35 young innovators, 2007, who
will create the future by transforming existing industries and establishing new
ones
·
ESSL
Research Leadership Award “for achieving
recognition as a power management expert in the HP internal and external system
architecture community”, December 2006, Awarded to one person at the lab
level
·
IEEE
Senior Member, August 2006, ACM Senior Member, December 2006
·
Hewlett
Packard e-Award, in recognition of
creating a virtual team to overcome international and organizational boundaries
while combining two unique technology areas, namely user interfaces and low
power design for new HP PDA products, April 2004
·
Alumni Acknowledgement Award, Indian Institute of
Technology,
·
Alumni Service Award, IIT
·
Lodeiska Stockbridge Vaughan Fellowship, for
outstanding achievement and promise, 1996-1997
(awarded to one graduate student from all departments in the Rice School of Engineering.)
·
·
Government of
Selected Press Features
(40+ interviews and features, in magazines and
newspapers in North America, South America, Asia, and Europe)
·
“HP Labs aims at exascale
computing,” EEtimes, September, 2008
·
Hp.com patent profile (“features the company’s most creative people — the top
inventors, patent holders and engineers – and what inspires them”), August,
2008
·
“Proliferation of devices hinders energy efficiency,”
IndUS BusinessJournal, March,
2008
·
“HP Looks To Improve Power Management Coordination“,
Slashdot 3/08
·
“Looking at datacenter power of the future,” ComputerWorld, February 08
·
“Benchmarking
Power-Efficient Servers", Slashdot, 8/21/07
·
“HP researcher achieves victory in power struggle,”
EE times, August 2007
·
“Future stock”, Times of
·
“MIT’s Tech Review Honors Young Energy Stars,”
earth2tech.com
·
“Building an energy efficient home computer,”
blogs.zdnet.com, September 2007
·
“HP's Green Data Center Portfolio Keeps Growing,”
InternetNews.com, 2007
·
HP Global Citizenship Report, 2006
·
“The heat is off!” – featured in new ideas for
revolutionary technology, MIT Technology Review, July 2005
·
Slashdot
and Tom’s hardware guide, March 2005 (250+ responses)
·
Hp.com, physorg.com, News.PDA Live!, PDAlive.com, davesipaq.com.
March 2005
·
(French)
L’Ordinateur individual, March 2005
·
(Italian)
Se Consumi Ti SpengoSE, WellcomeNews,
March 2005
·
(Swedish) Forskning & Framsteg,
March 2005
·
(Brazilian) A arte
de economizar energia em portáteis, Jornal do Brasil, March
2005
·
(German) Neue Displays verbrauchen
weniger Strom, Welt am Sonntag, January 2005
·
(Dutch)
ArtikelAG, "PDA kan mit minder energy," December 2004
·
“Energy-saving screens,” MIT Technology Revie, December 2004
·
Mobile PC, "Fade
to gray," November 2004
·
Power Electronics Technology, “Smarter Power Management Techniques Promise More Power for Portables,”
September 2004
·
Lead
feature in San Francisco Chronicle Business Section, “HP tests tactics to save
batteries,” September 2004
·
Business
Week, “The Race for Brawnier Batteries,”
June 2004
·
Video
interviews
Everyday Edisons,
PBS 2008
Pod-Planet.com, “Advances in power management,”
Podcast interview, August 2007
Research
Contributions
Exascale data centers. I am the principal
investigator for the exascale datacenter project at
HP Labs. This research seeks to create and demonstrate an end-to-end data center
infrastructure solution designed ground-up with total costs of ownership and
manageability in focus. We systematically redesign individual platform elements
as efficient building blocks with their role in the broader solution in mind,
to be used in combination with a powerful management layer at the datacenter
level to dynamically monitor and manage resources for global efficiency and
improved capabilities. Sub-contributions of the project include (1) disaggregated shared platforms in
dematerialized datacenters, with powerful hardware-aware resource
management co-designed into the virtualization layer, (2) connected by an end-to-end networking architecture,
spanning vNICs to switches, providing QoS management over converged fabrics, (3) with rich management
and platform capabilities delivered through a ecosystem of virtual appliances
driven by powerful abstractions for cross-layer
communication and coordination.
Power- and energy-efficiency. My recent research
focuses on designing power- and energy-efficient systems for future computing
environments (from small mobile devices to dense servers in data centers). Some of the contributions of this work
include: Energy-adaptive displays and
energy-aware user interfaces that pioneered the notion of displays that
adapt their energy consumption based on scope of user interest; this improves
display battery usage two-fold to twenty-fold. Heterogeneous multi-core architectures that propose the use of core
diversity in chip multiprocessor to match workload requirements to
architectural power efficiency; this enables two-fold to ten-fold improvements
in processor power. Power-aware blade
architectures that propose the notion of power budget enforcement at the
enclosure level through hardware-software co-ordination to leverage variations
in typical usage patterns; this improves blade power budgets by a factor of
two. Facilities-aware data center
resource provisioning solutions that adapt workload scheduling to optimize
for power and cooling costs in addition to performance; for example,
temperature-aware resource scheduling can reduce annual cooling costs (often
millions of dollars) in large data centers by half. Our work has also developed several new
approaches for power measuring and monitoring, including JouleSort, energy-based statistical profiling, location-aware knowledge planes,
as well as proxy-based environmental
modeling. Using these tools, we have also performed several detailed
studies (often the first such in the literature) of power consumption of real system
deployments, and have influenced industry standards and metrics.
High-performance and
better programmability. My dissertation research focused on
application-optimized architecture designs in response to changes in the
application mix favoring database, media, and communication applications, as
well as improvements to performance, programmability, and simulation of
multiprocessor systems enabled by the emergence of processors that aggressively
leveraged instruction-level parallelism (ILP).
Specific optimizations that emerged out of this work include reconfigurable caches – a design that
enabled on-the-fly reuse of otherwise under-utilized memory resources,
Patents
More than 50
patents pending or issued. Please see
Keynotes,
Panels, and Tutorials
1.
Designing servers and datacenters for the exascale computing era, Keynote presentation at the Rice University
Industrial Affiliates Meeting, 2008
2.
System implications of integrated photonics
(with Norm Jouppi), International
Symposium on Low Power Electronics, September, 2008
3.
Low-Power PDA displays, Keynote
feature presentation at PortablePower 2004
4.
The Innovation Process, with the exascale datacenter as a case study, HP GDIC Innovation Symposium, August 2008
5.
The Power Management Challenge: Getting the Next 100X, Keynote presentation at the 2nd workshop on optimizations
for DSPs and Embedded Systems, 2004
6.
Panel Participation:
o
Towards
a zero-carbon footprint for the IT ecosystem: energy-efficient servers and
datacenters, Canada-California Strategic Innovation Partnership Green IT
workshop, 2008
o
Rethinking server design for the ensemble, Gigascale institute workshop, 2008
o
Panel Chair, “Power
management from cores to datacenters: where are we going to get the next 10X?”,
ISLPED 2008
o
Exascale Software Challenges DARPA white paper, July 2008
o
National Science Foundation, Computer systems
panel, April 2008
o
“Energy-efficient Next-Generation Data Centers for
Sustainable Business Outcomes”, HP Press Panel, July 2007
o
National Science Foundation, Computer systems
panel, January 2007
o
National Science Foundation, Computer systems
panel, September 2005
o
Panel – “Important Research Challenges in
Temperature-aware Computer Systems”, TACS, June 2005
o
Panel – “New Products and Applications”, PortablePower 2004
o
National Science Foundation, Computer systems
panel, June 2004
o
National Science Foundation, Computer systems
panel, February 2003
o
Round-table
discussion on ``Limits and Future'', Workshop on Mixing Logic and DRAM: Chips
that Compute and Remember,
7.
Tutorials
o
Enterprise Power and Cooling: A chip-to-datacenter
perspective, HotChips 2007
o
Enterprise Power and Cooling: A chip-to-datacenter
perspective, ASPLOS 2006
Book
1. Parthasarathy
Ranganathan and T. N. Vijaykumar, “Power-aware computer architectures: from
chips to data centers,” Morgan Kaufmann, Under development, for December 2009
Publications
(copies available from http://www.hpl.hp.com/personal/Partha_Ranganathan)
Under preparation/review
2.
“Power-aware computing principles,”
Parthasarathy Ranganathan, CACM 2008 [pdf]
3.
“A
Comparison of High-Level Full-System Power Models,” Suzanne Rivoire,
Parthasarathy Ranganathan, Christos Kozyrakis, 2008 [pdf]
4.
“Delivering Energy Proportionality with Non
Energy Proportional Systems – Optimizations at the Ensemble Layer,” Niraj
Tolia, Zhikui Wang, Manish Marwah, Cullen Bash, Parthasarathy Ranganathan,
Xiaoyun Zhu, 2008 [pdf]
5.
“Power Aware Design and Operation of Data
Center Networks,” Priya Mahadevan, Puneet Sharma, Sujata Banerjee, Partha
Ranganathan, 2008 [pdf]
6.
“Tracking the Power in an Enterprise Decision
Support System,” Justin Meza, Mehul A. Shah, Parthasarathy Ranganathan, Mike
Fitzner, Jay Veazey, 2008 [pdf]
7.
“Motivating
integrated switch and NIC functionality for future manycore
servers,” J. Mudigonda et al, 2008 [pdf]
8.
“Micromanagers:
Platforms for Manageability in Future Virtualized Multicore
Environments,” Jacob Leverich et al, 2008 [pdf]
9.
“Slice
and Share: Memory disaggregation for consolidation and cost-effectiveness”,
Kevin Lim et al, 2008 [pdf]
10. “Zephyr, Hot and
Cold: Unified power and cooling management for the datacenter”, Niraj Tolia, Zhikui Wang, Manish Marwah,
Cullen Bash, Parthasarathy Ranganathan, Xiaoyun Zhu, 2008 [pdf]
11. "vManage: Coordinated Cross-layer Management in Virtualized
Systems," Sanjay Kumar, Vanish Talwar, Vibhore Kumar, Parthasarathy
Ranganathan, Karsten Schwan, 2008 [pdf]
12. “COVERT:
Configurable Virtual Redundancy with Transparent Availability on Commodity
Software,” Nidhi Aggarwal, Norman Jouppi, Parthasarathy Ranganathan, Jim Smith,
Kewal Saluja, 2008 [pdf]
13. "Defining and Evaluating Metrics for
Manageability Efficiency," Jacob Leverich, Vanish Talwar, Parthasarathy
Ranganathan, Christos Kozyrakis, 2007 [pdf]
14. “Closely Coupled Operating System Pairs for
Emerging Manageability Architectures,” Vanish Talwar and Parthasarathy
Ranganathan, 2007 [pdf]
Reviewed publications
15. “Power modeling and
measurement,” Parthasarathy Ranganathan, Suzanne Rivoire, Justin Moore, Advances in Computers, Elsevier, Book
Chapter, 2008 [pdf]
16. "Implementing
High-Availability Memory with a Duplication Cache," Nidhi Aggarwal, Norman
Jouppi, Parthasarathy Ranganathan, Jim Smith, Kewal Saluja, Annual
IEEE/ACM International Symposium on Microarchitecture,
December 2008 [pdf]
17. “M-Channels and M-Brokers: Coordinated
Management in Virtualized Systems,” Sanjay Kumar, Vanish Talwar, Parthasarathy
Ranganathan, Ripal Nathuji,
Karsten Schwan, Workshop on Managed
Multi-Core Systems (MMCS), June 2008
[pdf]
18. “Feedback Control
Algorithms for Power Management of Servers,” Zhikui Wang et al, Third International Workshop on Feedback Control Implementation and
Design in Computing Systems and Networks (FeBID),
June 2008 [pdf]
19. “vManage:
Coordinated Management in Virtualized Systems,” Sanjay Kumar, Vanish Talwar, Parthasarathy
Ranganathan, Karsten Schwan, Third
Workshop on Hot Topics in Autonomic Computing (HotAC),
April 2008 [pdf]
20. “Coevolution
of Operating Systems and Asymmetric Single-ISA CMPs,” Nathan Binkert, Jeffrey
C. Mogul, Jayaram Mudigonda, Parthasarathy Ranganathan, Vanish Talwar, IEEE Micro, 2008 [pdf]
21. "Microblades
and Megaservers: Server Architectures for Emerging Warehouse-Computing
Environments,", Reza Bacchus,
Jichuan Chang, Tom Flynn, Kevin Lim,
Chandrakant Patel, Parthasarathy Ranganathan, Robert Van Cleve, Proceedings of Techcon,
May 2008 [hp-pdf]
22. Understanding and
Designing New Server Architectures for Emerging Warehouse-Computing
Environments, Kevin Lim, Parthasarathy Ranganathan, Jichuan Chang, Chandrakant
Patel, Trevor Mudge, Steve Reinhardt, Proceedings
of the International Conference on Computer Architecture (ISCA), June 2008 [pdf]